PlayStation 3 Silicon Architecture — Static System Matrix

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PS3

Cell Broadband Engine 90nm STI ARCHITECTURE

Interactive Silicon & Companion Hardware Spatial Explainer

HETEROGENEOUS CPU 3.2 GHz

Cell Broadband Engine™

CBEA01 • 90nm / 65nm / 45nm STI Architecture

Microarchitecture Topology

Architectural Role

The exotic centerpiece of the PlayStation 3.

The Architectural Compromise

Massive vector FLOPS, but required manual DMA buffer orchestration.

"The Cell processor was a beast. When programmed correctly, it was five to ten times faster than any x86 PC CPU on the market in 2006." — Mark Cerny, PS3 Lead System Architect

CHAPTER 1 OF 8

The Silicon Ambition: The $400M Supercomputing Gamble

Sony • Toshiba • IBM STI Alliance (2001–2005)

In 2001, Sony partnered with Toshiba and IBM to build a radically exotic processor. Rather than scaling a single monolithic out-of-order CPU, they designed an asynchronous supercomputing node on a chip: one conductor CPU paired with eight specialized vector engines.

WASD / Arrows Pan & Orbit Space Tour 1-7 Jump L Peel C Compare

Architectural Metric	PlayStation 3 (Sony)	Xbox 360 (Microsoft)	Nintendo Wii (Nintendo)
CPU Architecture	Cell Broadband Engine 1x PPE (3.2GHz) + 7x SPEs (3.2GHz) 218 GFLOPS Theoretical Peak	Xenon 3x Symmetrical PowerPC Cores (3.2GHz, 6 Threads) 115 GFLOPS Peak	Broadway 1x PowerPC 750CL Core (729 MHz) ~2.9 GFLOPS Peak
GPU Architecture	NVIDIA RSX "Reality Synthesizer" 550MHz • 24 Pixel / 8 Vertex Pipelines Discrete Pixel/Vertex Split	ATI Xenos 500MHz • 48 Unified Shaders + 10MB eDRAM Free 4x MSAA & Unified ALUs	ATI Hollywood 243MHz • Fixed-Function / TEV Pipeline Standard Definition (480p)
Memory Setup	Segregated 512MB Pool: 256MB XDR (25.6 GB/s) + 256MB GDDR3 (20.8 GB/s) Hard Partition Wall	Unified 512MB GDDR3 (UMA): 22.4 GB/s Shared + 256 GB/s eDRAM Bus Flexible Shared Allocation	88MB Total Memory: 24MB Internal 1T-SRAM + 64MB External GDDR3 Strictly Constrained
Internal Interconnect	Element Interconnect Bus (EIB) 4 Concentric 16-byte Rings (1.6 GHz) 204.8 GB/s Ring Bandwidth	FSB Crossbar Interconnect Point-to-point to Memory Controller 21.6 GB/s CPU-GPU Bus	Proprietary Internal Bus Direct CPU-to-GPU Link 1.9 GB/s Bus Bandwidth
Optical Media & Storage	50 GB Dual-Layer BD-ROM (2x) Mandatory internal 2.5" SATA HDD Won the Format War • Huge Capacity	8.5 GB DVD-9 (12x) Optional HDD (Core / Arcade had none) Multi-disc Swapping Required	4.7 GB / 8.5 GB Optical Disc 512MB Flash Storage No Disc Installs
Anti-Aliasing & Post-FX	No eDRAM. Devs forced to invent MLAA (Morphological AA) on SPEs! Software Engineering Triumph	10MB embedded DRAM (eDRAM) performed 4x MSAA resolve with zero frame penalty. Hardware Accelerated MSAA	Minimal anti-aliasing; output maxed at analog 480p component. Standard Definition

PlayStation 3 Verdict

The Asynchronous Powerhouse. Bruised at launch by its $599 price, split 256MB memory, and grueling learning curve. But once first-party studios built SPU job engines (SPURS), the SPEs acted as high-performance compute shaders performing vertex skinning, deferred lighting, cloth, and physics. Late-gen games like The Last of Us and God of War III demonstrated visual fidelity unattainable on any other seventh-generation console.

Xbox 360 Verdict

The Developer's Sweetheart. Microsoft's symmetrical 3-core Xenon and revolutionary unified ATI Xenos GPU with free eDRAM MSAA made early multi-platform development effortless. It dominated the first four years of the generation, though DVD capacity limits (8.5GB) and the lack of a mandatory hard drive constrained late-generation world sizes.

Nintendo Wii Verdict

The Cultural Phenomenon. Nintendo sidestepped the HD silicon arms race entirely. Using GameCube-derived silicon clocked slightly higher, the Wii triumphed on accessible motion controls and low cost, selling over 101 million units, proving that raw silicon FLOPS do not solely determine market victory.

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